1. Field of the Invention
The present invention relates to semiconductor manufacturing technology, and more particularly, to a method for packaging semiconductor integrated circuit chips using an elastomer chip carrier.
2. Description of the Prior Art
A major trend in the electronics industry today is toward products that are lighter, smaller, faster, more multi-functional, more powerful, more reliable, and less expensive. One of the key technologies for achieving these product goals is that of electronic packaging and assembly. Chip-size package, or chip-scale package, (CSP) is a type of semiconductor package that has recently been developed in response to the above trend. More than ten companies in the U.S.A., Japan, and Korea have developed various technologies for manufacturing various types of CSPs.
One type of CSP is the so-called Micro Ball Grid Array (.mu.BGA) package introduced by Tessera, Inc. in the U.S. The .mu.BGA package of Tessera uses a flexible "circuit interposer" and a layer of silicone elastomer. FIG. 1 shows, in partial section, a .mu.BGA package 10 having an elastomer layer 17.
Referring to FIG. 1, a flexible circuit interposer 16 includes a polyimide dielectric film 13 with conductive through-holes, or vias 18, copper traces 14 and beam leads 15. A layer of elastomer 17 is placed between the flexible circuit interposer 16 and a semiconductor die, or chip 11, with one side of the elastomer 17 being attached to the flexible circuit interposer 16 and the other side of the layer being attached to the chip 11. Conductive traces 14 are connected to the vias 18, and beam leads 15 extending from the traces 14 are bonded to input/output pads 12 on the chip 11. After bonding, the bonding area, including the pads 12 and beam leads 15, are encapsulated with an encapsulant 19 to seal and protect them from the environment. Solder bumps 20 are formed at the vias 18 to define input/output terminals for the package 10.
FIG. 2 depicts the conventional, prior art manufacturing process 30 for manufacturing the .mu.BGA package 10 illustrated in FIG. 1. The process 30 for manufacturing the pBGA package 10 begins with step 31, in which a flexible circuit interposer 16 is fabricated. In step 31, a photolithography technique widely known in the art is used to form copper traces 14 and beam leads 15 on a polyimide film 13. Vias 18 for conductive solder bumps 20 are also formed in the film 13.
In step 32, an elastomer layer 17 is applied to the flexible circuit interposer 16 by means of a conventional screen printing method and then cured in place. If necessary, the elastomer screen printing process may be repeated until a required thickness of the layer is achieved. In step 33, a microchip 11 is attached to the elastomer 17, and in step 34, the beam leads 15 on the interposer are bonded to input/output pads 12 on the chip.
In step 35, the bonding area is encapsulated with an encapsulant 19, and in step 36, solder bumps 20 are formed at vias 18. A final step 37 may involve the separation, or "singulation," of a plurality of simultaneously fabricated .mu.BGA packages 10 into individual packages.
Typical CSPs, as well as the particular .mu.BGA package described above, have a common drawback that relates to the formation of the elastomer layer. When the elastomer layer is formed on the flexible circuit interposer by a conventional screen printing method, a viscous layer of fluid elastomer is applied onto the interposer and then cured in an oven. However, the viscous fluidity of the elastomer may cause certain defects in the carrier, such as voids, a non-uniform thickness, and an overflow of the elastomer. These defects can, for example, prevent the beam leads from bonding to the pads of the chip when the elastomer is either too thick or when it overflows laterally to the extent that it covers the chip pads. In addition, an overflow of the elastomer often degrades the encapsulation, and can even result in a delamination of the device.